Impulse Voltage Generation
Reproducing lightning and switching on command, to microsecond precision.
The previous modules dealt with stresses that evolve over milliseconds to minutes. This one enters the transient domain: waveshapes that are born, reach hundreds of kilovolts and die within tens of microseconds. No power apparatus fails simply because it held rated voltage for decades; most catastrophic dielectric failures start in a transient. A lightning strike on a transmission line injects a travelling wave that arrives at the transformer with a front of a fraction of a microsecond. A breaker operation in an extra-high voltage network produces a switching overvoltage whose crest forms over hundreds of microseconds. Those are physically distinct stresses, which is why international standardisation settled on two families of test waveshape.
The lightning impulse stands in for the externally originated overvoltage: 1.2 µs front, 50 µs tail. The switching impulse stands in for the internally generated one, relevant chiefly above 245 kV: crest at 250 µs, half value at 2500 µs. The three orders of magnitude between them are not a detail. They change the physical mechanism of breakdown, and in long air gaps a switching impulse is frequently more severe than a lightning impulse of the same crest, which is what drives clearance design at the highest voltage classes. One warning on nomenclature before anything else. IEC 60060-1:2025 introduced a calculated front time for the switching impulse, analogous to the lightning impulse treatment, and now designates the standard switching impulse 170/2500 µs instead of the historic 250/2500 µs based on time to crest. Since the installed base, laboratory procedures and product standards still use the older name, this module presents both vocabularies. Always confirm which edition governs the contract before issuing a report.
What you will be able to do
Characterise the standard lightning and switching impulse waveshapes: virtual front time T1, virtual origin O1, time to half value T2, time to crest Tp, and the normative tolerances.
Apply the IEC 60060-1 overshoot treatment: base curve, residual, the weighting function k(f) = 1/(1 + 2.2·f²) with f in MHz, the recomposed test voltage curve, and the 10% limit on relative overshoot.
Explain the multistage Marx generator — capacitors charged in parallel, fired and discharged in series — and the role of every resistor, capacitor, sphere gap and trigatron.
Compute generator efficiency, overall and capacitive, and choose configurations for objects of different capacitance and inductance.
Distinguish full, chopped, steep-front and oscillating impulses, including the OLI and OSI forms of IEC 60060-3, and state the test purpose of each.
Explain statistical and formative time lag, interpret a volt-time curve, and run the up-and-down method to determine U50 on self-restoring insulation.
The wave you report is not the wave you recorded
The designation 1.2/50 µs does not mean the voltage reaches crest in exactly 1.2 µs. The front time T1 is a virtual parameter, computed from the instants at which the voltage passes 30% and 90% of crest on the front: T1 = 1.67·(t90 − t30), where the factor 1.67 is the linear extrapolation of the 30 to 90% segment onto the full 0 to 100% interval. The straight line through those two points, extended to the time axis, defines the virtual origin O1, which precedes t30 by 0.3·T1. Using a virtual origin removes the initial curvature of the wave and small delays of the generating and measuring systems from the count. T2 is measured from O1 to the instant on the tail where the voltage has fallen to half crest. Tolerances are ±30% on T1, ±20% on T2 and ±3% on the crest value.
Real circuits have inductance, and inductance with capacitance oscillates. Impulse records frequently show an overshoot around the crest, caused by resonance between the generator and loop inductance and the object capacitance. Dielectric physics shows that very narrow, high-frequency peaks do not have, in most insulating media, the disruptive effectiveness of a sustained elevation. IEC 60060-1 handles this rigorously. Fit a double-exponential base curve Ub(t) to the recorded curve Ur(t), compute the residual R(t) = Ur(t) − Ub(t), filter that residual with the weighting function k(f) = 1/(1 + 2.2·f²) with f in MHz, and recompose the test voltage curve Ut(t) = Ub(t) + Rf(t). Test value, T1, T2 and overshoot are all extracted from that processed curve, and the relative overshoot must stay at or below 10%. A worked case makes the stakes obvious: base curve at 1000 kV with a dominant 80 kV oscillation at 1 MHz. The raw record shows 1080 kV, but k(1 MHz) = 0.3125, so the processed test voltage is 1000 + 0.3125 × 80 = 1025 kV. Reporting 1080 kV would be a normative error, and would wrongly fail an object tested at the correct level.
One stage, two topologies, and where the efficiency goes
Every impulse generator, from the simplest to a 3 MV Marx, contains the same fundamental cell. A DC source slowly charges a storage capacitor C1 through a charging resistor. A sphere gap abruptly connects C1 to the forming network. The front resistor R1 controls how fast charge transfers to the load capacitance C2. The tail resistor R2 sets the slow discharge. C2 is not a component you buy: it is the sum of the object capacitance, the divider, the connections and the strays. That is why the waveshape changes when the object changes, and why every generator adjustment is made with the object, or an equivalent, connected.
Classical practice distinguishes two topologies by where R2 sits. In circuit A the tail resistor is on the object side, in parallel with C2 after R1. In circuit B it is on the generator side, in parallel with C1. The difference looks subtle and is not: in circuit A, R1 and R2 form a resistive divider that subtracts voltage from the object at the very instant of crest. The efficiency approximations make it explicit — η_B ≈ C1/(C1+C2), while η_A ≈ [C1/(C1+C2)]·[R2/(R1+R2)]. Commercial generators mostly adopt circuit B or hybrids with front resistors distributed per stage. For pre-dimensioning, T1 ≈ 3·R1·Ce with Ce = C1·C2/(C1+C2), and T2 ≈ 0.7·R·(C1+C2), are useful for picking resistor modules but can be 20% wrong; final adjustment is always experimental.
Marx arithmetic: voltage multiplies, capacitance divides, energy does neither
The idea Erwin Marx published in 1923 solves the cost problem in one stroke. Charge n stage capacitors Cs in parallel, each to the stage voltage Vs, typically 100 kV, through charging resistors. On firing, the sphere gaps conduct in sequence and the capacitors are stacked in series, erecting ideally n·Vs. The real output is η_M·n·Vs, where the overall efficiency folds in capacitive sharing with the load, resistive and arc losses, stray capacitance between stages and to earth, and any firing delay. Erection is itself a cascade: firing the first gap redistributes potentials and overvolts the second, which breaks down and overvolts the third, and ultraviolet from the first arc photo-ionises the neighbouring gaps and cuts the statistical delay. That is why many generators keep their gaps in optical line of sight along the column. Commanded firing uses a trigatron, a three-electrode gap in which an auxiliary pin excited by a pulse of a few to tens of kilovolts produces local discharge, field distortion and streamers that precipitate breakdown at the chosen instant. Excessive jitter produces partial erection, steps on the front, oscillations and internal stage overvoltages.
Two structural consequences deserve emphasis. First, the erected capacitance falls with stage count, C_g = Cs/n, so a ten-stage generator with 1 µF per stage presents only 0.1 µF to the object. More voltage means less ability to feed a capacitive load. Second, energy does not multiply: W = n·½·Cs·Vs² is the same sum of stage energies whether the bank is charged in parallel or erected. A twelve-stage generator at 100 kV and 1 µF per stage stores 60 kJ, at 1.2 MV or at 100 kV. Catalogue reading requires the same care: nameplate total charging voltage is not the crest available at the object, which depends on the specified capacitive load, the resistor configuration and the polarity. And note that generator capability and the accredited range of the complete measuring system are different quantities — a report is valid only inside the second.
The object dictates the waveshape
Charge transfer between the erected generator C_g and the load C_L gives a capacitive efficiency η_C ≈ 1/(1 + C_L/C_g). To keep η_C above 90%, C_g must be at least ten times C_L, which is a conservative rule of thumb rather than a normative requirement. Cables are the extreme case: power cables run 0.1 to 0.4 µF/km, so a 5 km run at 0.2 µF/km presents 1 µF, and against an erected 0.1 µF the capacitive efficiency collapses to 9.1%. Of every 1000 kV erected, 91 kV reach the cable. Worse, high C combined with generator inductance stretches the front, produces oscillation and overshoot, and can exceed the energy capability of the gaps. The engineering exits are more capacitance per stage, parallel columns, operation with fewer stages at higher current, or abandoning the aperiodic shape entirely in favour of the oscillating impulses of IEC 60060-3.
A transformer under impulse is not a capacitor. It is a distributed network of series capacitances between turns and discs, capacitances to core and tank, and leakage and magnetising inductances. During the 1.2 µs front, capacitance and wave propagation dominate, and the initial voltage distribution can concentrate brutally on the first discs of the winding. On the tail, inductance takes over: T2 shortens, the wave can oscillate, cross zero and reverse polarity. Getting a 40 to 60 µs tail on a low-inductance winding requires more C_g, a dedicated tail resistor, controlled termination of the windings not under test, or a stage reconfiguration. IEEE Std C57.98 models the test circuit with its capacitive-inductive load explicitly. Reactors push this to the limit, where an underdamped RLC response produces a short tail and reversal; adding resistance to damp it dissipates energy and drops the crest, so the structural answer is more C_g. Stray inductance is the other constant companion: 3 to 5 µH per generator stage, about 1 µH per metre of conductor, and a few µH in imperfectly non-inductive resistors add to tens or hundreds of µH per test loop. With L = 50 µH and C = 2 nF the loop rings at about 503 kHz, and k(0.503 MHz) ≈ 0.64, so 64% of that oscillation counts in the test voltage. Minimise the physical loop, use non-inductive resistors, and accept that R1 is also a damper: raising it lengthens the front but tames the overshoot.
Chopped, steep, oscillating — and the physics of delay
When lightning flashes over an insulator near a transformer, the wave arriving at the winding collapses in a fraction of a microsecond, and that collapse with its brutal dv/dt is reproduced by the chopped lightning impulse. A chopping gap in parallel with the object is fired at the chosen instant, and the key parameter is the time to chopping Tc measured from the virtual origin O1. For chopping on the tail, the classic transformer case, IEC 60076-3 typically calls for Tc between 2 and 5 µs. Chopping on the front, before the prospective crest, gives an even more severe dv/dt and is used on bushings and insulators. Because a single gap scatters the chopping instant, multiple chopping gaps with capacitive grading and commanded firing are used to tighten Tc. Steep-front impulses above 2500 kV/µs, used for puncture testing under IEC 61211, demand war on inductance: minimum R1, a peaking capacitor at the object, an auxiliary gap close by, and coaxial layouts, since at that rate of rise one metre of connection already degrades the front. For on-site work, IEC 60060-3 admits oscillating shapes obtained by inserting a series inductance: resonance lets the first crest reach up to roughly twice the aperiodic response for the same charging voltage. OLI covers 15 to 400 kHz and OSI covers 1 to 15 kHz — and note those are frequency bands, not microsecond designations.
Between sufficient voltage and the arc lies a random interval, t_d = t_s + t_f. The statistical time lag t_s waits for an initiating electron to appear in a favourable position, and depends on cosmic radiation and natural radioactivity, photo-ionisation, ultraviolet from neighbouring gaps, pressure, polarity and gap history. If initiating events arrive at rate λ, then P(t_s > t) = e^(−λt) and the mean is 1/λ, so more initial electrons mean less delay and less scatter. The formative time t_f covers the physical construction of the channel — avalanche, streamer, leader, transition to arc — and falls with overvoltage. Apply impulses of constant prospective shape and rising amplitude to the same insulation and record voltage against time to breakdown, and you get the volt-time curve: at short times the insulation demands much higher voltage, and as more time is available the breakdown voltage falls to a flat tail region. Kind's disruptive effect law, DE = ∫[u(t) − U0]^k dt integrated while u(t) > U0, explains why a very high narrow crest may not break down while a lower sustained voltage does: what matters is the integral of the excess over the threshold, not the peak. That curve is also the link to protection engineering, because insulation coordination requires the protective device curve to sit below the protected insulation curve across the whole time range, and the voltage at the equipment terminal is not the arrester residual voltage but U_residual + L·di/dt + U_connections.
Syllabus
The double exponential u(t) = U0·(e^(−αt) − e^(−βt)) and the time constants of each standard wave
Virtual front time T1 = 1.67·(t90 − t30), virtual origin O1, and time to half value T2
Lightning impulse tolerances: T1 0.84 to 1.56 µs, T2 40 to 60 µs, crest ±3%
Switching impulse: Tp ±20%, T2 ±60%, time above 90% as a supplementary parameter
Overshoot: base curve, residual, k(f) weighting, test voltage curve, relative overshoot ≤ 10%
The single-stage RC cell: charging resistor, storage capacitor, sphere gap, front and tail resistors
C2 as the sum of object, divider, connections and stray capacitance
Circuits A and B, and the efficiency penalty of putting the tail resistor on the object side
Approximations T1 ≈ 3·R1·Ce and T2 ≈ 0.7·R·(C1+C2), and their 20% error
Marx multiplication: V × n, C_g = Cs/n, W = n·½·Cs·Vs²
Sphere gap erection cascade, UV photo-ionisation between gaps, and the triggered trigatron
Jitter, partial erection and the oscillograms that reveal them
Capacitive efficiency η_C ≈ 1/(1 + C_L/C_g) and the ten-to-one rule of thumb
Cables as the extreme load; transformers and reactors when inductance takes over
Stray inductance of 3 to 5 µH per stage and 1 µH per metre of conductor
Chopped impulses on the tail and on the front; multiple chopping gaps
Steep-front impulses above 2500 kV/µs under IEC 61211
Oscillating impulses under IEC 60060-3: OLI from 15 to 400 kHz, OSI from 1 to 15 kHz
Statistical and formative time lag, the volt-time curve and the disruptive effect law
The up-and-down method for U50, step size, discards and the 20-application minimum
Laboratory work
A medium-scale impulse bench covering the full cycle of the module. Assembly and identification: locate the stage capacitors, charging resistors, front and tail resistors, sphere gaps, chopping gap, divider and ground loop, measure the component values on an RLC bridge and compare against the data sheet. Configuration: set the gap spacings for the chosen charging voltage, pre-compute T1 and T2 from the approximate formulas, fire and capture the oscillogram. Efficiency: compare the ideal erected n·Vs against the crest measured at the object for three load capacitances, build the η against C_L/C_g curve experimentally and confront it with the theoretical sharing values. Waveshape adjustment: change R1 and R2 in a directed way to bring T1 and T2 inside tolerance with the object connected, and observe the overshoot appearing as the front is shortened too far. Up-and-down test: twenty valid applications on a rod gap with a step of 1 to 5% of the estimated U50, recording each application as withstand or discharge, discarding the initial applications up to the first reversal, waiting 60 to 180 s between impulses to let residual ionisation and surface charge dissipate, then computing a preliminary U50 and discussing the scatter. Report acceptance: annotated oscillograms with T1, T2, crest and overshoot; the complete up-and-down table with its reversal sequence; the efficiency calculation with simple error propagation; and a discussion of at least one observed deviation between prediction and measurement.
Key takeaway
The oscillogram is the symptom; the circuit is the patient. A 3.8 µs front with correct crest means R1 is oversized or the object is more capacitive than assumed. A 28 µs tail on a distribution transformer means winding inductance is dominating the discharge. An 18% overshoot at 600 kHz means the test loop has grown, and with k ≈ 0.55 more than half of it still counts in the test voltage: failed. A step on the front with the crest 12% low means one stage did not fire. And a chopping time wandering from 2.1 to 4.9 µs means a single chopping gap where a commanded multiple gap belongs.
Module 6 of the Atlas Energy Academy · Generating & Measuring · about 6 hours · Video series plus hands-on impulse bench practice (part A) · Prerequisites: Module 5 — DC Generation and Measurement
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